Contacts in Nanoscale and Contacts for Nanomaterials
Organized by IEEE Electron Devices Society of the IEEE Czechoslovakia Section
“Contacts in Nanoscale and Contacts for Nanomaterials” by Professor Hei Wong, City University of Hong Kong, China. IEEE Distinguished Lecturer.
Date: April 7, 2026 (Tuesday)
Time: 1:00 pm – 1:45 pm
Venue: room T2:B2-s141k, CTU Faculty of Electrical Engineering, Technická 2, 160 00 Prague, Czech Republic
Abstract
Scaling contacts remains one of the most critical challenges in nano complementary metal-oxide-semiconductor (CMOS) technology. As device dimensions shrink into the nanometer regime, issues such as surface roughness, reduced contact size, limited film thickness, and the use of undoped substrates become increasingly significant. These factors increase contact resistance and introduce variability and nonlinearity in the current–voltage characteristics, potentially limiting the benefits of further CMOS miniaturization. This talk will examine these challenges and explore potential solutions for next-generation nano CMOS technologies. In the second part of this talk, attention will shift to the emerging field of ohmic contacts in two-dimensional (2D) materials. Key difficulties—including restricted doping levels, limited metal selection for band alignment, elevated Fermi-level pinning, and the impact of van der Waals gaps—will be analyzed. Strategies for improving ohmic contact performance, such as 2D/metal van der Waals contacts, hybrid contact structures, junction doping, phase and bandgap engineering, and buffer layers, will be highlighted. Finally, the validity of the Schottky contact model in 2D material/high-k/silicon heterostructures will be critically evaluated.
Speaker
Hei Wong received his Ph.D. in Electrical and Electronic Engineering from the University of Hong Kong. In 1989, he joined the Department of Electronic Engineering at City University of Hong Kong, and is currently a full professor of the Department. He has also held visiting professorships at the 21st Century Centre of Excellence (COE21) for Photonics-Nanodevice Integration Engineering at the Tokyo Institute of Technology, Japan, and at Zhejiang University, China.
Dr. Wong served as the founding Chair of the IEEE ED/SSC Hong Kong Joint Chapter from 2002 to 2003. He is actively involved in international steering committees, technical program committees, and organizing committees for numerous conferences worldwide. His editorial contributions include serving as editor or guest editor for leading journals such as Microelectronics Reliability (Elsevier), IEEE Transactions on Electron Devices, IEEE Transactions on Nanotechnology, Nanomaterials, Electronics, and Materials. He is the founding Editor-in-Chief of the Semiconductors and Heterogeneous Integration journal and has also served as Regional Editor for the IEEE Electron Device Society Newsletter. Since 2002, he has been a Distinguished Lecturer for the IEEE Electron Device Society.
His research spans MOS device modelling and characterization, thin-film dielectric physics, micro- and nano-fabrication technology, MOS integrated circuit design, and solid-state sensors. Dr. Wong is the author or co-author of four books and more than 400 research papers. Notably, he co-authored Guide to State-of-the-Art Electron Devices, jointly published by Wiley and IEEE to commemorate the 60th anniversary of the IRE Electron Devices Committee and the 35th anniversary of the IEEE Electron Devices Society. Dr. Wong has delivered numerous invited talks and keynote speeches at international conferences. Since 2019, he has consistently been recognized on the Stanford/Elsevier list of the World’s Top 2% Scientists.